A partial scan methodology for testing self-timed circuits
This paper presents a partial scan method for testing control sections of macromodule based self-timed circuits for stuck-at faults. In comparison with other proposed test methods for self-timed circuits, this technique offers better fault coverage than methods using self-checking techniques, and requires fewer storage elements to be made scannable than full scan approaches with similar fault coverage. A new method is proposed to test the sequential network in this partial scan environment. Experimental data is presented to show that high fault coverage is possible using this method with only a subset of storage elements being made scannable.
University of Utah
Self-timed circuits; Testing;
Khoche, A., & Brunvand, E. L. (1995). A partial scan methodology for testing self-timed circuits. UUCS-95-001.
University of Utah Computer Science Technical Report